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1 publication order number : lc823433ta/d ? semiconductor component s industries, llc, 2015 may 2015 - rev. 1 ordering information see detailed ordering and shipping info rmation on page 20 of this data sheet. www.onsemi.com lc823433ta overview lc823433ta is an audio processing system for mp3 record and playback devices. it integrates dsp for digital signal processing and analog blocks such as audio adc, audio dac, and speaker and headphone amplifier in addition to lcd segment driver. features ? 32bit lpdsp32 - sram (246kb) ? pm 75kb (40kb + 35kb : isolated) ? dma 170kb (16kb + 154kb:isolated) ? dmb 1kb (isolated) isolated area : power on/off cont rol is available by register. - rom (264.5kb) ? pm 227.5kb (isolated) ? dma 34kb (isolated) ? dmb 3kb (isolated) isolated area : power on/off contro l is available by the register. - sio (clock serial io 2ch) ? sio0 : ch0 esio (clock speed = sysclk/1 (max)) program load and execute is possible using serial flash (after internal rom boot) ? sio1 : ch1 sio (clock speed = sysclk/8 (max)) - uart (1ch) - i 2 c (1ch single master, full/standard) - plain timer (2ch) ? timer0 : w/ watch dog timer ? timer1 : w/o watch dog timer and xt1 operation - multiple timer (2ch) pwm output (1ch) - rtc (real time clock) operating voltage is independent of internal core operating voltage. only rtc power supply can be active du ring all others inactive (isolated). continued on next page. cmos lsi audio processing system lsi for mp3 record and playback devices * i 2 c bus is a trademark of philips corporation. tqfp128 14x14 / tqfp128l
lc823433ta www.onsemi.com 2 continued from preceding page. - sd card if (2ch) (w/o cprm) esd/emmc can be connected. ? sd ch0 : program load and execute using esd/ emmc (after internal rom boot) is possible. ? sd ch1 : sd card - usb2.0 (480mbps/12mbps) device if. built-in phy - 10bit a/d converter (3ch) - gpio (31ch) (gpios share the terminals with other functions. refer to the terminal list in detail). ? lcd controller, lcd driver. 18seg * 8com, 1/8duty, 1/4bias - internal rom boot is possible. - firmware writing function. the firmware reading from sd ch1 and writing to the following devices: ? serial flash connected sio0. ? emmc/esd connected sd ch0. - jtag (for debugger) ? audio functions - record and playback ? compression method : mp3 1 (mpeg1/2/2.5 layer3). stereo/mono compatible. ? sampling frequences : 8khz, 11.025khz, 12khz, 16khz, 22.05khz, 24khz, 32khz, 44.1khz, and 48khz ? bitrate : 8kbps (*1) to 320kbps (for decoder-vbr) (*1) encoder supports only mono (one channel) for 8kbps. - adjusting the playback speed ? fast playback : 1.0 times to 2.0 times 10 steps. ? slow playback : 0.5 times to 1.0 times 10 steps. - multipurpose filter - audio data automatic transfer function ? the audio buffer executes the data transfer between internal sram (dma) and the audio block. wait cycle(s) is inserted to the lpdsp32 access to the sram while th e audio buffer accesses to internal sram(dma). - digital volume, digital mute, beep, and level meter ? the interrupt generation function at the operation completion (e.g. interrupt at mute completion). - audio timer ? lr clock count and the interrupt generation function. - flexible pcm audio inte rface (two interfaces) ? master/slave mode selectable ? data formats : i 2 s mode etc. - sample rate converters ? 0.5times to 64 times conversion range. - digital microphone if (2ch) continued on next page. 1 mpeg layer-3 audio coding technology licensed from fraunhofer iis and thomson. supply of this product does not convey license nor imply any right to distribute content created with this product in revenue-generating broadcast systems (terrestrial, satellite , cable and/or other distribution channels), streaming applications (via internet, intranets and/or networks), other content distribution systems (pay-audio or audio-on-demand applications and the like) or on physical media (compact disc s, digital versatile discs, semiconductor chips, hard drives, memory cards and the like). supply of this product does not convey license under the relevant intellectual property of thomson and/or fraunhofer gesellschaft nor imply any right to use this product in any finished end user or ready-to-use final product. an independent license for such use is required. for details, please visit http://mp3licensing.com/.
lc823433ta www.onsemi.com 3 continued from preceding page. ? analog function - microphone amplifier 0/18/24/30db (2ch) - pga with alc -12db to 35.25db in 0.75db steps (2ch) - 16 bit ? adc (2ch) - digital filter for 16 bits ? dac (2ch) - ab class amplifier the power supply only to ab class amplifier is possible (isolated). thermal shutdown circuit built-in ? speaker amplifier (1ch btl) 1db to 4.5db in 0.5db steps maximum output 300mw @3.0v, speaker = 8[ ? ], 1db ? headphone amplifier (2ch) 0db to 3db in 1db steps (only same gain setting to 2ch is possible) maximum output 5mw @3.0v, headphone = 16[ ? ], rd (series) = 33[ ? ], 1db ? clock - rcosc : internal rc oscillation. 1mhz (typ.) - xt1 : main xtal. 32.768khz. used as an original oscillation of the system clock and the audio clock, and a rtc clock. - xt2 : optional xtal. 12mhz (typ) etc. - pll1 : for system clock generation (lpdsp32 is included). - pll2 : for audio clock generation specification ? supply voltage : 1.3v (core, etc), 3.15v (audio, usb, etc) ? maximum operation frequency : 42mhz (dsp@1.3v) ? package : 128pin tqfp application ? ic recorder, audio player ? radio recorder, home audio (mini compo)
lc823433ta www.onsemi.com 4 specifications absolute maximum ratings at v ss = 0v parameter symbol domain of applicability ratings unit supply voltage v dd 1 v dd rtc av dd pll1 av dd phy1 ? 0.3 to +1.8 v v dd 2 v dd lcd av dd pll2 av dd adc av dd aadc av dd adac av dd spamp av dd phy2 ? 0.3 to +3.96 v input voltage v i ? 0.3 to *v dd *+0.3 (max 3.96) v operating temperature topr ? 20 to +75 ? c storage temperature tstg ? 55 to +125 ? c recommended operating conditions at ta = ? 20 ? c to +75 ? c parameter symbol test conditions min typ max unit supply voltage v dd 1 1.15 1.3 1.65 v v dd rtc 0.9 1.5 1.65 v av dd pll1 1.15 1.3 1.65 v v dd 2 2.7 3.15 3.3 v v dd lcd 2.7 3.15 3.3 v av dd pll2 2.7 3.15 3.3 v av dd adc 2.7 3.15 3.3 v av dd aadc 2.7 2.8 3.3 v av dd adac 2.7 2.8 3.3 v av dd spamp 1.8 3.15 3.8 v av dd phy1 1.35 1.5 1.65 v av dd phy2 3.0 3.15 3.6 v input voltage v in 0 *v dd *v v in 3 (rtc) 0 3.6v v in _adc (an0-an2). i_an ? 300 ? a 0 3.3v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should n ot be assumed, damage may occur and reliability may be affected. functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresses beyond the recomme nded operating ranges limits may affect device r eliab ility.
lc823433ta www.onsemi.com 5 dc characteristics at ta = ? 20 ? c to +75 ? c, v dd 1 = 1.15v to 1.65v, v dd 2 = 2.7v to 3.3v, v dd rtc = 0.9v to 1.65v parameter symbol application test conditions min typ max unit input high voltage v ih 3icud 0.7 ? v dd 2 v 3is, 3isud schmitt 0.75 ? v dd 2 v 1ic 0.7 ? v dd rtc v 1is schmitt 0.7 ? v dd rtc v input low voltage v il 3icud 0.3 ? v dd 2v 3is, 3isud schmitt 0.25 ? v dd 2v 1ic 0.2 ? v dd rtc v 1is schmitt 0.2 ? v dd rtc v input high leakage current i ih 3icud, 3is, 3isud v in = v dd 2 10 ? a 1ic, 1is v in = 3.3v 10 ? a input low leakage current i il 3is, 3isud v in = v ss ? 10 ? a 1ic, 1is v in = v ss rtc ? 10 ? a output high voltage v oh 3t2 i oh = ? 2ma v dd 2 ? 0.4 v 3t4 i oh = ? 4ma v dd 2 ? 0.4 v 3t4(8) i oh = ? 4ma (i oh = ? 8ma) v dd 2 ? 0.4 v 3t6(12) i oh = ? 6ma (i oh = ? 12ma) v dd 2 ? 0.4 v output low voltage v ol 3t2 i ol = 2ma 0.4 v 3t4 i ol = 4ma 0.4 v 3t4(8) i ol = 4ma (i ol = 8ma) 0.4 v 3t6(12) i ol = 6ma (i ol = 12ma) 0.4 v od3 i ol = 0.3ma 0.3 v output leakage current i oz 3t2, 3t4, 3t4(8), 3t6(12) when it outputs hi-z ? 10 10 ? a pull-up resistor rup 3icud, 3isud 30 80 190 k ? pull-down resistor rdn 3icud, 3isud 30 80 190 k ? product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product per formance may not be indicated by the electrical characteristics if operated under different conditions.
lc823433ta www.onsemi.com 6 package dimensions unit : mm tqfp128 14x14 / tqfp128l case 932ba issue a a = assembly location wl = wafer lot yy = year ww = work week g = pb-free package *this information is generic. please refer to device data sheet for actual part marking. generic marking diagram* xxxxxxxxxxx xxxxxxxxxxx awlyywwg
lc823433ta www.onsemi.com 7 pin assignment (bonding option) direction attribute i input pin 3is 3v schmitt i nput 1is 1v schmitt input. (3v tolerant correspondence) o output pin 3icud 3v cmos inpu t pull-up/down 1ic 1v cmos input (3v tolerant correspondence) b bidirectional pin 3isud 3v schmitt input pull-up/down od3 1v 0.3ma open drain output (3v tolerant correspondence) p power supply pin 3t2 3v 2ma tristate output 3t4 3v 4ma tristate ou tput x oscillation amplifier 3t4(8) tristate output with 3v 4ma/8ma switch function 3a 3v analog through 3t6(12) tristate output with 3v 6ma/12ma switch function 1a 1v analog through tqfp128l pin no. name direction attribute 1 av ss spamp p 2 av dd spamp p 3 avrefsp o 3a 4 hpinl/spkinm i 3a 5 hpinr i 3a 6 av ss adac p 7 outmr o 3a 8 outml/outm o 3a 9 av dd adac p 10 av ss aadc p 11 avref o 3a 12 av dd aadc p 13 ainl i 3a 14 ainr i 3a 15 av dd adc p 16 an0 i 3a 17 an1 i 3a 18 an2 i 3a 19 v ss p 20 v dd 2 p 21 v dd 1 p 22 tioca0/p10 b/b 3isud/3t2 23 bmode0 i 3is 24 bmode1 i 3is 25 bmode2 i 3is 26 nres i 3is 27 sdclk1/mclk1/p00 o/b/b 3isud/3t6(12) 28 sdcmd1/lrck1/p02 b/ o/b 3isud/3t4(8) 29 sdat10/bck1/p03 b/b/b 3isud/3t4(8) 30 sdat11/din1/p04 b/i/b 3icud/3t4(8) 31 sdat12/dout1/p05 b/o/b 3icud/3t4(8) 32 sdat13/sdo1/p06 b/o/b 3icud/3t4(8) 33 sdwp1/sdi1/p01 i/i/b 3isud/3t2 34 sdcd1/sck1/p0a i/b/b 3isud/3t2 35 sdclk0/p14 o/b 3icud/3t6(12) 36 v dd 2 p 37 v ss p 38 sdcmd0/p15 b/b 3icud/3t4(8) continued on next page.
lc823433ta www.onsemi.com 8 continued from preceding page. tqfp128l pin no. name direction attribute 39 sdat03/p16 b/b 3icud/3t4(8) 40 sdat02/p17/sysclk b/b/o 3icud/3t4(8) 41 sdat01/p18/aud0clk b/b/o 3icud/3t4(8) 42 sdat00/p19/aud1clk b/b/o 3icud/3t4(8) 43 v ss p 44 xin2 i x 45 xout2 o x 46 av dd phy1(+v dd 1) p 47 av ss phy1 p 48 av ss phy1 p 49 rref b 3a 50 av ss phy2 p 51 av dd phy2 p 52 av dd phy2 p 53 av ss phy2 p 54 av ss phy2 p 55 av ss phy2 p 56 av dd phy2 p 57 dp b 3a 58 dm b 3a 59 av ss phy2 p 60 av dd phy2 p 61 com0 o 3a 62 com1 o 3a 63 com2 o 3a 64 com3 o 3a 65 v dd lcd p 66 vlcd1 o 3a 67 vlcd2 o 3a 68 vlcd3 o 3a 69 v ss p 70 v dd 1 p 71 seg0 o 3a 72 seg1 o 3a 73 seg2 o 3a 74 seg3 o 3a 75 seg4 o 3a 76 seg5 o 3a 77 seg6 o 3a 78 seg7 o 3a 79 seg8 o 3a 80 seg9 o 3a 81 seg10 o 3a 82 seg11 o 3a 83 seg12 o 3a 84 seg13 o 3a 85 seg14 o 3a 86 seg15 o 3a 87 seg16 o 3a 88 seg17 o 3a 89 com4 o 3a 90 com5 o 3a continued on next page.
lc823433ta www.onsemi.com 9 continued from preceding page. tqfp128l pin no. name direction attribute 91 com6 o 3a 92 com7 o 3a 93 hpdet/sdi1/scl/p1a i/i/o/b 3isud/3t2 94 hpmute/sdo1/sda/p1 b o/o/b/b 3isud/3t2 95 jtdo/p1c o/b 3icud/3t2 96 jtdi/p1d i/b 3icud/3t2 97 jtms/p1e i/b 3icud/3t2 98 jtck/p1f i/b 3icud/3t2 99 v dd 1 p 100 v dd 2 p sfmode (internal signal) i 3is 101 v ss p 102 txd/scl/p12 o/ o/b 3isud/3t2 103 rxd/sda/p13 i/b/b 3isud/3t2 104 sck0/p07 b/b 3isud/3t4 105 sdo0/p08 o/b 3isud/3t4 106 sdi0/p09 i/b 3isud/3t2 107 mclk0/dmcko/sck1/p0b b/o/b/b 3isud/3t2 108 din0/dmdin/p0f i/i/b 3isud/3t2 109 dout0/p0e/ncs o/b/o 3isud/3t2 110 keyint1 i 1is 111 keyint0 i 1is 112 rtcrstb i 1ic 113 pwron o od3 114 linefixb i 1is 115 xout32k o x 116 xin32k i x 117 v dd rtc p rtcmode (internal signal) i 1is 118 v ss rtc p 119 av dd pll1 p 120 vcnt1 o 1a 121 v ss p 122 av dd pll2 p 123 vcnt2 o 3a 124 av ss pll2 p 125 hpoutr o 3a 126 hpoutl o 3a 127 spoutp o 3a 128 spoutn o 3a
lc823433ta www.onsemi.com 10 block diagram pll1 xt1 32.768khz sanyo 32bit dsp lpdsp32 audio buffer (write to, read from dma) pll2 rom (3kb) plain timer0 multiple timer sd i/f esio (sio1) uart 10bit a/d rtc 16bit a/d 16bit d/a (2ch/btl) lpf audio functions (src, volume, etc) gpio esd emmc lcd irq 15ch audio clock0 jtag pwm pwm xt2 pga(alc) -12 to 35.25db v dd 1 v dd 2 av dd adc av dd spamp v dd lcd logic i/o 10bit a/d lcdctl v dd rtc av dd pll1 av dd pll2 pll1 pll2 firmware dl etc ch0 ch1 prg dmio sram (35kb) + (40kb) mic 1 3 i 2 c note - refer to the pin assignment for port share - isolated srams and roms described in this figure can be power off by a register, in addition to the tiny srams (not described in this figure) in the sd i/f, usb2.0, src, 16bit d/a, df. digital mic if s/p pcm0 in p/s pcm0 out s/p pcm1 in p/s pcm1 out pdm lpf ?lch? or ?+? ?rch? speaker headphone ?-? ?+? 40 64 32 rom (227.5kb) sram (154kb) + (16kb) sram (1kb) rom (34kb) pm dma dmb plain timer1 lcd ctl lcd 18seg 8com or 36seg 4com(tbd) funcclk1 funcclk1 esio (sio0) s-flash boot etc sio ch0 sio ch1 emmc/esd boot xt1 rcosc xt2 system clock boot monitor etc arbiter ?lch? ?rch? av dd adac av dd aadc usb2.0 hs device usb2.0 phy xt2 or xt2/2 av dd phy1 av dd phy2 dmb dma 32 64 peripheral1 peripheral2 peripheral0 isolated isolated isolated isolated isolated 0/18/24/30db mic amp -12 to 35.25db mic 0/18/24/30db mic amp 16bit a/d mux df + alc pga(alc) dig mic isolated isolated 1 to 4.5db 0 to 3db(lch, rch common) osccon (system) osccon (audio) peripheral0 clock peripheral1 clock peripheral2 clock funcclk1 osccon (func) funcclk0 audio clock1 mclk0, mclk1 bck0, bck1 xt1 xt2 system clock xt1 xt2 system clock on semiconductor 32bit dsp lpdsp32
lc823433ta www.onsemi.com 11 pin functions ? jtag pin name pol. type description num. jtdo/ p1c -/ - o/ b jtag test data output/ general purpose port 1 jtdi/ p1d -/ - i/ b jtag test data input/ general purpose port. the input level of the terminal jtdi is taken by rising edge of the terminal nres. the value can be read as a register, and can be used as the operation mode setting. 1 jtms/ p1e -/ - i/ b jtag test mode selection/ general purpose port the input level of the terminal jtms is taken by rising edge of the terminal nres. the value can be read as a register, and can be used as the operation mode setting. 1 jtck/ p1f pos/ - i/ b jtag test clock/ general purpose port 1 total 4 ? rtc pin name pol. type description num. xin32k pos i 32.768khz oscillation amplifier input (xt1) 1 xout32k - o 32.768khz oscillation amplifier output (xt1) 1 rtcrstb (vdet) neg neg i i rtc reset input there is an optional bonding as power supply watch comparison input. 1 pwron (rtcint) - neg o o main power supply on/off control there is an optional bonding as rtc interrupt output. 1 linefixb (backupb) neg neg i i rtc isolator cutting and the connection there is an optional bonding as rtc operation mode selection. 1 v dd rtc - p rtc block power supply. 1 v ss rtc - p rtc ground pin. 1 total 7
lc823433ta www.onsemi.com 12 ? sio (synchronous serial) interface ch0 (esi o)/timer pwm output/gen eral purpose port pin name pol. type description num. sck0/ p07 pos/ - b/ b serial i/f ch0 clock/ general purpose port (it is possible to use it as an external interrupt input.) 1 sdo0/ p08 (sdo0(sio0)) -/ - -(-) o/ b o(b) serial i/f ch0 data output/ general purpose port (it is possible to use it as an external interrupt input). there is an optional bonding as serial i/f ch0 data output (data i/o 0 when at high speed operating). 1 sdi0/ p09 (sdi0(sio3)) -/ - -(-) i/ b i(b) serial i/f ch0 data input/ general purpose port (it is possible to use it as an external interrupt input). there is an optional bonding as serial i/f ch0 data input (data i/o 3 when at high speed operating). 1 tioca0/ p10 (v ss ) -/ - - b/ b p mtm ch0 a input capture and output capture/ general purpose port there is an optional bonding as v ss . 1 total 4 ? uart (asynchronization serial) interface/i 2 c interface/general purpose port pin name pol. type description num. txd/ scl/ p12 -/ -/ - o/ o/ b uart transmitted serial data output/ i 2 c clock output (open drain output)/ general purpose port (it is possible to use it as an external interrupt input). 1 rxd/ sda/ p13 -/ -/ - i/ b/ b uart received serial data input/ i 2 c data (open drain output)/ general purpose port (it is possible to use it as an external interrupt input). 1 total 2 ? headphone control/sio (synchronou s serial) interface ch1 (sdi, sdo)/i 2 c interface/general purpose port pin name pol. type description num. hpdet/ sdi1/ scl/ p1a pos/ -/ -/ - i/ i/ o/ b headphone insertion detection/ serial i/f ch1 data input/ i 2 c clock output (open drain output)/ general purpose port (it is possible to use it as an external interrupt input). 1 hpmute/ sdo1/ sda/ p1b pos/ -/ -/ - o/ o/ b/ b headphone mute/ serial i/f ch1 data output/ i 2 c data (open drain output)/ general purpose port 1 total 2
lc823433ta www.onsemi.com 13 ? pcm interface ch0/digital mic interface/ sio (synchronous serial) interface ch1 (sck)/ general purpose port/rtc (keyint rtc model) pin name pol. type description num. mclk0/ dmcko/ sck1/ p0b pos/ -/ -/ - b/ o/ b/ b pcm ch0 master clock/ digital mic clock output/ serial i/f ch1 clock/ general purpose port (it is possible to use it as an external interrupt input). 1 keyint1 (nhold(sio1)) (bck0/ p0c) - - -/ - i o(b) b/ b key interrupt1 (notes: operate in v dd rtc and the v ss rtc power supply). there is an optional bonding as serial i/f ch0 hold output (data i/o 1 when at high speed operating). there is an optional bonding as pcm ch0 bit clock/ general purpose port 1 keyint0 (nwp(sio2)) (lrck0/ p0d) - - -/ - i o(b) b/ b key interrupt0 (notes: operate in v dd rtc and the v ss rtc power supply). there is an optional bonding as serial i/f ch0 write protect output (data i/o 2 when high speed operating). there is an optional bonding as pcm ch0 lr clock/ general purpose port (it is possible to use it as an external interrupt input). 1 din0/ dmdin/ p0f -/ -/ - i/ i/ b pcm ch0 data input/ digital mic data input/ general purpose port (it is possible to use it as an external interrupt input). 1 dout0/ p0e/ ncs (ncs) -/ -/ neg neg o/ b/ o o pcm ch0 data output/ general purpose port (it is possible to use it as an external interrupt input)/ cs for serial i/f ch0 (when it boots from internal rom and the program from serialflash connected to serial i/f ch0 is loaded, it is used as cs control terminal of serialflash). there is an optional bonding as cs for serial i/f ch0. 1 total 5
lc823433ta www.onsemi.com 14 ? sd interface ch0/general purpose port pin name pol. type description num. sdclk0/ p14 pos/ - o/ b sd card i/f ch0 clock output/ general purpose port 1 sdcmd0/ p15 -/ - b/ b sd card i/f ch0 command line/ general purpose port 1 sdat03/ p16 -/ - b/ b sd card i/f ch0 data 3/ general purpose port 1 sdat02/ p17/ sysclk -/ -/ - b/ b/ o sd card i/f ch0 data 2/ general purpose port/ system clock output (for evaluation) 1 sdat01/ p18/ aud0clk -/ -/ - b/ b/ o sd card i/f ch0 data 1/ general purpose port/ audio0 clock output (for evaluation) 1 sdat00/ p19/ aud1clk -/ -/ - b/ b/ o sd card i/f ch0 data 0/ general purpose port/ audio1 clock output (for evaluation) 1 total 6 ? sd interface ch1/pcm interface ch 1/sio (synchronous serial) inte rface ch1/general purpose port pin name pol. type description num. sdclk1/ mclk1/ p00 pos/ pos/ - o/ o/ b sd card i/f ch1 clock output/ pcm ch1 master clock/ general purpose port 1 sdcmd1/ lrck1/ p02 -/ -/ - b/ b/ b sd card i/f ch1 command line/ pcm ch1 lr clock/ general purpose port 1 sdat13/ sdo1/ p06 -/ -/ - b/ o/ b sd card i/f ch1 data 3/ serial i/f ch1 data output/ general purpose port 1 sdat12/ dout1/ p05 -/ -/ - b/ o/ b sd card i/f ch1 data 2/ pcm ch1 data output/ general purpose port 1 sdat11/ din1/ p04 -/ -/ - b/ i/ b sd card i/f ch1 data 1/ pcm ch1 data input/ general purpose port 1 sdat10/ bck1/ p03 -/ -/ - b/ b/ b sd card i/f ch1 data 0/ pcm ch1 bit clock/ general purpose port 1 sdwp1/ sdi1/ p01 -/ -/ - i/ i/ b sd card i/f ch1 write protect/ serial i/f ch1 data input/ general purpose port (it is possible to use it as an external interrupt input). 1 sdcd1/ sck1/ p0a -/ -/ - i/ b/ b sd card i/f ch1 card detect/ serial i/f ch1 clock/ general purpose port (it is possible to use it as an external interrupt input). 1 total 8
lc823433ta www.onsemi.com 15 ? oscillation amplifier and pll pin name pol. type description num. xin2 pos i oscillation amplifier input for audio (xt2) 1 xout2 - o oscillation amplifier output for audio (xt2) 1 vcnt1 - o vco control for pll1 1 av dd pll1 - p analog power supply for pll1 1 av ss pll1 - p analog ground for pll1 1 vcnt2 - o vco control for pll2 1 av dd pll2 - p analog power supply for pll2 1 av ss pll2 - p analog ground for pll2 1 total 8 ? 10bita/d pin name pol. type description num. an[2:0] - i adc input 3 av dd adc - p power supply for adc 1 v ss (av ss adc) - p ground for adc. it connects v ss in lsi (terminal sharing). there is an optional bonding as dedicated ground av ss adc . 1 total 5 ? audio codec pin name pol. type description num. ainl - i analog voice input lch (stereo) analog voice input (monaural). 1 ainr - i analog voice input rch (stereo) 1 avref - o audio adc reference output 1 av dd aadc - p power supply for audio adc 1 av ss aadc - p ground for audio adc 1 outml/ outm -/ - o/ o audio dac pwm output (lch for hp)/ audio dac pwm output (monaural for speaker) 1 outmr - o audio dac pwm output (rch for hp) 1 av dd adac - p power supply for audio dac 1 av ss adac - p ground for audio dac 1 hpinl/ spkinm - i/ i headphone amplifier input (lch) / speaker amplifier input (monaural) 1 hpinr - i headphone amplifier input (rch) 1 spoutp - o ab class speaker amplifier output (+) 1 spoutn - o ab class speaker amplifier output (-) 1 hpoutl - o headphone amplifier output (lch) 1 hpoutr - o headphone amplifier output (rch) 1 avrefsp - o ab class amplifier reference output 1 av dd spamp - p analog power supply for ab class amplifier 1 av ss spamp - p analog ground for ab class amplifier 1 total 18
lc823433ta www.onsemi.com 16 ? lcd driver (4com/8com bonding switch) pin name pol. type description num. seg[17:0] - o segment output for lcd 18 com[7:4] (seg[21:18]) - - o o com [7:4], common driver output for lcd (when 8com is used). there is an optional bonding as segment outputs, seg[21:18], for the lcd(when 4com is used). 4 com[3:0] - o common driver output for lcd. ?both 8com and 4com com[3:0]. 4 vlcd1 - o lcd drive voltage output 1 ?when 1/3bias is used 2 * v dd lcd /3. ?when 1/4bias is used 3 * v dd lcd /4. 1 vlcd2 - o lcd drive voltage output 2 ?when 1/3bias is used 1 * v dd lcd /3. ?when 1/4bias is used 2 * v dd lcd /4. 1 vlcd3 - o lcd drive voltage output 3 ?when 1/3bias is used 1 * v dd lcd /3. ?when 1/4bias is used 1 * v dd lcd /4. 1 v dd lcd - p 3v power supply for lcd driver 1 total 30
lc823433ta www.onsemi.com 17 ? usb 2.0 hs device/lcd driver (bonding switch when 4com is used) pin name pol. type description num. dp (seg32) - - b o usb d+ (device) there is an optional bonding as segment output 32 for lcd. 1 dm (seg33) - - b o usb d- (device) there is an optional bonding as segment output 33 for lcd. 1 rref (seg24) - - b o reference resistance for usb phy. there is an optional bonding as segment output 24 for lcd. 1 av dd phy1 - p analog 1.5v power supply for usb phy. it connects v dd 1 in lsi (terminal sharing). 1 av ss phy1 (seg22) - - p o analog ground for usb phy. there is an optional bonding as segment output 22 for lcd. 1 av ss phy1 (seg23) - - p o analog ground for usb phy. there is an optional bonding as segment output 23 for lcd. 1 av dd phy2 (seg26) - - p o analog 3.3v power supply for usb phy. there is an optional bonding as segment output 26 for lcd. 1 av dd phy2 (seg27) - - p o analog 3.3v power supply for usb phy. there is an optional bonding as segment output 27 for lcd. 1 av dd phy2 (seg31) - - p o analog 3.3v power supply for usb phy. there is an optional bonding as segment output 31 for lcd. 1 av dd phy2 (seg35) - - p o analog 3.3v power supply for usb phy. there is an optional bonding as segment output 35 for lcd. 1 av ss phy2 (seg25) - - p o analog ground for usb phy. there is an optional bonding as segment output 25 for lcd. 1 av ss phy2 (seg28) - - p o analog ground for usb phy. there is an optional bonding as segment output 28 for lcd. 1 av ss phy2 (seg29) - - p o analog ground for usb phy. there is an optional bonding as segment output 29 for lcd. 1 av ss phy2 (seg30) - - p o analog ground for usb phy. there is an optional bonding as segment output 30 for lcd. 1 av ss phy2 (seg34) - - p o analog ground for usb phy. there is an optional bonding as segment output 34 for lcd. 1 total 15
lc823433ta www.onsemi.com 18 ? power supply etc. pin name pol. type description num. bmode[2:0] - i operation mode selection 3 nres neg i external reset and gpio?lcd driver output force input ?when it is active (l input), the state of the gpio?lcd driver is forced, and led lighting and the lcd display is controlled until reset depends on lsi. when low is input : gpio = hiz, lcd = low fixed (piofixb). ?the state of jtdi and jtms of jtag is taken into the internal register by rising edge of nres (for operation mode setting). 1 v dd 1 - p digital internal power supply there is one v dd 1 which is also connected with av dd phy1. 3 v dd 2 - p digital io power supply 3 v ss - p digital ground there is one v ss which is also connected with av ss adc. 4 total 14 total 128 notes : do not open an unused digital input terminal or a digital bidirectional terminal of input state, and set pull-up/pull-down register in on (only terminals with this function) or connect to digital io power supply or digital ground. left open ainl, ainr, hpinl/spkinm, and hpinr termin als if they are not used (do not fix to l or h). operational mode various boot modes etc. can be selected by switching bmode[2:0] terminal. bmode2 bmode1 bmode0 operational mode 0 0 0 internal rom boot (emmc physical boot - sd interface ch0) 0 0 1 internal rom boot (ipl boot - sd interface ch0) 0 1 0 internal rom boot (partition boot - sd interface ch0) 0 1 1 internal rom boot (external serial flash boot - sio (synchronous serial) interface ch0) 1 0 0 liberation of the terminal for sd interface ch0 and sio ch0 (sdclk0, sdcmd0, sdat03, sdat02, sdat 01, sdat00, sck0, sdo0, sdi0, and dout0 (ncs) are output hiz). 1 0 1 internal rom boot (deletion partition area and ipl user area ? sd interface ch0 and sio external serial flash ch0) 1 1 0 lsi test mode (do not set to this mode when working actually). 1 1 1 lsi test mode (do not set to this mode when working actually).
lc823433ta www.onsemi.com 19 pin type 3icud/ 3t2 en3 = 0: pad is configured as input & pull_up off, pull_down off, en3 = 1 normal 3isud/ 3t2 3isud/ 3t4 en3 = 0: pad is configured as input & pull_up off, pull_down off, en3 = 1 normal 3icud/ 3t4(8) 3icud/ 3t6(12) cti current ability switch terminal 0: 4ma 1: 8ma/ 0: 6ma 1: 12ma en3 = 0:pad is configured as input & pull_up off, pull_down off, en3 = 1 normal 3isud/ 3t4(8) 3isud/ 3t6(12) cti current ability switch terminal 0: 4ma 1: 8ma/ 0: 6ma 1: 12ma en3 = 0: pad is configured as input & pull_up off, pull_down off, en3 = 1 normal continued on next page. pad en a y ctu ctd en3 pad en a y ctu ctd en3 pad en a y ctu ctd cti en3 pad en a y ctu ctd cti en3
lc823433ta www.onsemi.com 20 on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc) or its subsidiaries in the united st ates and/or other countries. scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a lis ting of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf . scillc reserves the right to make changes with out further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any parti cular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specific ations can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated fo r each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc pro ducts are not designed, intended, or authorized for use as com ponents in systems int ended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees ar ising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that sci llc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject t oall applicable copyright laws and is not for resale in any manner. continued from preceding page. 1ic 1is 3is od3 ordering information device package shipping (qty / packing) LC823433TAK-2H tqfp128 14x14 / tqfp128l (pb-free / halogen free) 450 / tray jedec pad y pad y pad en

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